
24
XENPAK-DEFINED REGISTERS (1.8000’H TO 1.8106’H)
Note (1): User writes to these bits are not valid unless the Command Status is Idle. The Command Status will not return to Idle until read after command completion
(either Succeed or Failed).
Note (2): At the end of a hardware RESET via the RSTN pin, on powerup, or on a register [1,3,4].0.15 RESET operation, and if the XP_ENA pin is asserted, the
ISL35822 will automatically begin an ‘all NVR read’ operation.
Note (3): The single byte commands are controlled through the bits of the registers at 1.32769:32774 (1.8001:8006’h). The ‘block write/read’ commands are affected by
register 1.32773 (1.8005’h). Additional status is available in 1.327743 (1.8006’h)
Note (1): 8-bit-addressed I2C devices are addressed using bits 7:0. Never set bit 1.32773.8 (1.8005’h.8) for 16-bit address operation with an 8-bit address I2C device.
Table 14. IEEE PACKAGE IDENTIFIER REGISTERS
MDIO REGISTER ADDRESSES = 1.14:15 (1.000E:F’h)
BIT
NAME
SETTING
DEFAULT
R/W
DESCRIPTION
1.14.15:0
Package ID
Package OUI bits 3:24 &
etc.
00’h
R/W
If NVR is loaded, these are copies of
1.32818:32819 (1.8032:8033’h) & 1.32820:32821
(1.8034:8035’h)
1.15.15:0
Package ID
00’h
R/W
Table 15. XENPAK NVR CONTROL & STATUS REGISTER
MDIO (XENPAK) REGISTER ADDRESS = 1.32768 (1.8000’h)
BIT
NAME
SETTING
DEFAULT
R/W
DESCRIPTION
1.32768.15:6
Reserved
000’h
R/W
1.32768.5
NVR Command(1)
1 = Write NVR
0 = Read NVR
0’b(2)
R/W
Write/Read Control for I2C operation
1.32768.4
Reserved
0’b
RO
1.32768.3:2
NVR Command
Status(3)
Current Status of
NVR Command
00’b
RO
11 = Command failed
10 = Command in progress/Queued
01 = Command completed with success
00 = Idle
1.32768.1:0
Extended NVR
Command
NVR operation to be
performed
11’b(2)
R/W
10 = read/write one byte(3)
11 = read/write all NVR contents(3)
Other values = reserved
Table 16. I2C ONE-BYTE OPERATION DEVICE ADDRESS REGISTER
MDIO REGISTER ADDRESS = 1.32769 (1.8001’h)
BIT
NAME
SETTING
DEFAULT
R/W
DESCRIPTION
1.32769.15:8
Reserved
00’h
RO
1.32769.7:0
Device
Address
I2C Device address to
access
A2’h
R/W
All I2C Device addresses are even. Bit 0 cannot be set.
Table 17. I2C ONE-BYTE OPERATION MEMORY ADDRESS REGISTER
MDIO REGISTER, ADDRESS = 1.32770 (1.8002’h)
BIT
NAME
SETTING
DEFAULT
R/W
DESCRIPTION
1.32770.15:0
Memory
Address
I2C Memory address to
access
0000’h(2)
R/W
I2C Memory Address within Device address of 1.32769
(1.8001’h)
Table 18. I2C ONE-BYTE OPERATION READ DATA REGISTER
MDIO REGISTER ADDRESS = 1.32771 (1.8003’h)
BIT
NAME
SETTING
DEFAULT
R/W
DESCRIPTION
1.32771.15:8
Reserved
00’h
RO
1.32771.7:0
Read Data
I2C Read Data
00’h
RO
Result of I2C 1-byte Read operation
ISL35822